The Making of the K5 Microprocessor.
- Speaker: Thomas W. Lynch
- Date: Tuesday, 23 January 2018 from 17:00 to 18:00
- Location: Room 151
The K5 was AMD's 6th generation microprocessor contribution to the IBM PC market. Prior to this project AMD had a successful bit slice processor line that had run its course, and then AMD had entered the RISC microprocessor market with its 29000 family. The K5 was to be AMD's first ground up x86 processor design. The technical concept was to transition a RISC superscalar design into an x86 CISC design by adding a unit that would translate the complex x86 instructions into sequences of RISC micro-ops. The hope was that this technique would allow AMD to leapfrog the competitors and to achieve next after next generation performance. Hundreds of computer engineers contributed to creating this product during the architecture, design, fabrication, and test phases. And even more engineers were involved when we consider the silicon process development. It is the purpose of this presentation to give the audience an idea of how the computer engineers took an architecture spec and turned it into a packaged microprocessor that was ready to be plugged into a computer.
Thomas Lynch was member of the design team that established AMD as a competitor with Intel, between 1986 and 1996, where he contributed to the designs of a number of microprocessors. He has a BSEE, and MSEE with thesis in AI and computer design, both from the University of Texas at Austin, in 1986 and 1996 respectively. Mr. Lynch has established or been a member of a number of startups companies in Austin Texas and Silicon Valley. He has 97 patents awarded internationally and related publications covering new approaches to fundamental operations, computer design and architecture, computer security, and social media.